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 Title: Subject: Owner: Affiliation:
What will be the verification tools in an open hardware development? What will be the test bench language? Should we get to common grounds? How? Open Hardware - OpenPOWER, OpenCores, RISC-V Bodo Hoppe IBM Deutschland R&D GmbH
CI in Chip-Level Physical Design Continuous HW/SW Engineering - From the Model to the Chip Marvin von der Ehe / Manuel Beck IBM Deutschland R&D GmbH
TDD and CI in AMS Hardware Development -- Need for Tools, Methods and Structures Continuous HW/SW Engineering - From the Model to the Chip Georg Gläser IMMS GmbH
How can we establish a "DevOps cycle" for embedded SW and HW/SW Co-Design? Continuous HW/SW Engineering - From the Model to the Chip Kim Grüttner OFFIS e.V
What can we do to support the publication of reproducible results? other Kim Grüttner OFFIS e.V.
AI for EDA - The solution for future chip design? AI for EDA, EDA for AI - Boost Design - Boost Learning Dieter Treytnar edacentrum
Non-formal Designer Experience -- Potential use-cases for AI algorithms in EDA AI for EDA, EDA for AI - Boost Design - Boost Learning  Georg Gläser IMMS GmbH
Automatic debug using AI -- The next step in verification? AI for EDA, EDA for AI - Boost Design - Boost Learning  Julian Heyne IBM Deutschland R&D GmbH
Very Early HW/SW Performance Evaluation - How to know what to build tomorrow? Continuous HW/SW Engineering - From the Model to the Chip Konstantin Lübeck University of Tübingen (Embedded Systems)
Design methodology and approaches for High-Speed Mixed-Signal design -- A survey on a practical example Continuous HW/SW Engineering - From the Model to the Chip Christoph Wagner Technische Universität Ilmenau
Testing Mixed-Signal Systems by co-emulation on programmable logic from open source software via Synchronous Data Flow Continuous HW/SW Engineering - From the Model to the Chip Christoph Wagner Technische Universität Ilmenau